Two-stage testing of automotive circuit boards.
2024-08-22 16:54
Dual-level testing is a method that isolates the in-circuit test (ICT) system from high-power circuits on the device under test (DUT) during functional testing (FCT). This minimizes the risk of excessive current flowing through the ICT system and damaging the electronic components within the DUT. Additionally, connecting the test fixture to the DUT increases capacitive loading on the circuit and may interfere with the functionality of crystals or oscillators during FCT. Therefore, the ability to disconnect unnecessary test probes on the DUT before running FCT can improve signal integrity and protect the test system.
Combining ICT and FCT testing methods within a single test station involves certain risks and considerations. This is particularly true for automotive circuit boards. Typical automotive circuits operate at 12 V in light vehicles, while circuits in heavier vehicles such as trucks and buses run at 48 V. These operating voltages exceed the handling capacity of ICT systems. ICT systems measure passive component values and perform digital pattern tests, such as flash programming or boundary scanning, under low-power conditions. These tests typically operate at 5 V or lower. Although ICT can supply and measure higher voltages up to 12 V or 24 V in low-current tests, these voltages are far lower than the operational power levels of vehicles. In such cases, using a dual-level testing method creates a protective barrier between high-power FCT and low-power ICT, safeguarding both the system and the DUT from electrical stress damage.
Dual-level test fixtures employ two types of test probes with different lengths: short probes and long probes. ICT tests use short probes, while FCT uses long probes. Typically, FCT requires only 10–20% of the total probes, as it only needs to supply power and communication channels to the DUT.
However, a standard test fixture includes test probes on both the top and bottom. Most test probes are located at the bottom, with the remainder on the top. Dual-level testing operations require connecting and disconnecting the test probes on both the top and bottom.
For the bottom dual-level operation, the press moves slightly upward, causing the shorter ICT probes to lose contact with the DUT due to their length, while the longer FCT probes remain engaged. This disconnects the ICT probes at the bottom from the DUT and sets the press to the bottom dual-level position.
While performing dual-level probing at the bottom is straightforward, achieving it with top probes is entirely different. Since the movement direction to engage the DUT is top-down, the top press cannot disconnect the ICT probes by moving upward, as it must continue pressing the DUT to maintain contact with the bottom FCT probes. In this scenario, moving the press upward cannot achieve the top dual-level position.
To address this issue, we install the top ICT probes on a separate probe plate secured by solenoids. Without moving the press, we can activate the solenoids to retract the ICT probe plate and disconnect it from the DUT at the top.
Integrating electronic components such as solenoids, sensors, or actuators into the test fixture requires additional connections, which can be cumbersome and unreliable. The Keysight i7090 automated test processor addresses this by providing a 24 V power supply for solenoids or sensors in the test fixture through its Fixture Identification (ID) block. This reduces the operator's reliance on connecting additional cables during setup. These blocks can be found on the back of both the top and bottom fixtures. Small solenoids or sensors installed within the test fixture can utilize this 24 V power supply, eliminating the need for any external power connections.
The Fixture ID block consists of three clusters, each with 16 pins. The central cluster provides a 24 V, 100 mA power supply on pins 15 and 16 of its cluster. Sensors requiring a constant power source are connected to pin 15, while solenoids for dual-level testing use pin 16. Once the fixture is inserted into the i7090 processor, the voltage on pin 15 is always enabled and connected to the sensors. This allows the sensors to function properly even when no test operations are running. The i7090 processor switches 24 V to pin 16 before entering dual-level test mode and turns it off after dual-level testing is completed. This ensures that the dual-level test solenoids in the test fixture switch to dual-level mode when the test operation enters the dual-level testing phase. As a result, no test plan is required to directly control the switching.
The PathWave Test Executive for Manufacturing (PTEM) test plan works in coordination with the Programmable Logic Controller (PLC) to synchronize its testing with the position of the DUT. After the PLC engages the DUT and makes contact with all probes in the fixture, the test plan executes ICT testing. This is the full-probe position. When the PLC moves the press upward to disconnect the shorter ICT probes, leaving only the longer probes in contact, this position is referred to as the long-probe position.
For normal testing operations that do not require dual-level testing, the test plan sends the `Handler_SetAllProbeDone` command to the PLC upon completion of ICT. The PLC then releases the DUT to the next downstream system.
Selecting the dual-level testing option slightly alters the process, including an additional operation to move the press to the dual-level testing position before releasing the DUT to the downstream system. This occurs after the ICT operation, where the test plan inserts an additional step to move the press to the long-probe position. This triggers the PLC to move the press to the long-probe position.
The test plan sends `Handler_SetAllProbeDone` to indicate that the ICT operation is complete. It then sends `Handler_MovePressUnitToLongProbePosition` to move the press upward and disconnect the short probes. Since the DUT is now only in contact with the longer FCT probes, the test plan can execute FCT steps without interference from the ICT probes.
After the FCT steps are completed, the test plan sends the `Handler_SetLongProbeDone` command to the PLC, indicating that all testing is finished. The PLC releases the press and transfers the DUT to the downstream system. A snapshot of the PTEM test plan for dual-level testing operations is shown below.
Does your production setup require dual-level testing? Check out our series of posts on test automation using Keysight i7090 with PTEM to learn more.
If you have any questions or comments, please feel free to reach out to me.
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